In this assignment you will be developing the micro-program that our machine uses to fetch, decode and execute machine language instructions. You will also be writing an assembly language program that fully tests your micro-program. Each group will complete their own version of project 6.

Micro-Programming:

Write and test a micro-program that is able to fetch, decode and execute all of the machine language instructions that our machine supports. The instructions that must be supported are described in the Machine Language Reference Card for our machine. The file microprog-start.masm has an implementation for fetch, decode and also for LOADi, LOADUi and STORE. This program is provided to get you started and to serve as an example. You will need to complete the micro-program by providing implementations for the following machine language instructions:

ADD NOT ADDi BRANCH JREG SUB SHL SUBi BZERO JAL AND SHR ANDi BNEG OR LOAD ORi BODD

With a micro-program that implements all of these instructions the VHDL simulation of our machine will be capable of executing any Assembly Language program assembled using the Assembler from project #1.

Assembly Language Programming:

As you add the micro-instructions that execute each of the machine language instructions you will need to be developing a machine language program that tests them. The program test-start.asm contains an assembly language program that tests the fetch, decode and the execution of the LOADi, LOADUi and STORE instructions that were given. You will need to augment this program to test each instruction as you add the microcode that executes it.

This section outlines the process for getting the machine simulator up and running with the provided starter micro-program and test program.

1. Create a directory for the project.
   
   
2. Download all of the "New Files" and the "Old Files" from below.
   
   
3. Copy your working solutions to project #2, #3, #4 and #5 to the project directory.
   
   
4. Download the given solutions to any of the projects to which your solutions did not work.
   
   
5. Download the analyze.bash file.
   
   
   This file is a shell script that will analyze all of the files necessary to create a complete VHDL simulator for our machine. This shell script is just a text file that contains a list of commands to the bash shell. Open analyze.bash in emacs. Make the appropriate changes to analyze.bash so that it will use your solutions to the projects. The sections of the file that need to be edited are indicated by comments. Make analyze.bash executable:

   chmod 755 analyze.bash

   
   
6. Run analyze.bash. If errors are generated identify and correct them then rerun analyze.bash.
   
   
7. Download the following files:
   1. microprog-start.masm
   2. microasm.jar
   3. test-start.asm
   4. Assembler.jar
   
   
8. Assemble the micro-program into an image file for the Microprogram ROM in the microprogram control control unit of the VHDL simulator:
   
   

   java -jar microasm.jar microprog-start.masm microrom.dat

   This command assembles the file microprog-start.masm into the the file microrom.dat that will serve as the ROM image. When the VHDL simulation is started it will load the contents of the microrom.dat file into the Microprogram ROM.

   Examining the microprog-start.masm file (open it in emacs) will give you an idea of how it is set up. This file is written using mnemonic names for the branch conditions and labels as the branch targets. This is much more convenient than having to calculate the branch addresses by hand. The microassembler then translates the mnemonic branch conditions and their target labels into binary for you. The microprogram ROM address at which a set of instructions will be stored can be specified by using an * followed by an address. For *48 before STORE. Note that 48 is the address generated by the "Opcode to micro-Address" translation unit. See class 22 for more details on the microprogram control unit, the address translations for other instructions and the valid branch condition mnemonics.

   
   
9. Assemble the test program into an image file for the main memory of the VHDL simulator:
   
   

   java -jar Assembler.jar test-start.asm memory.dat

   This command assembles the test-start.asm assembly language program into machine language and stores the result in the file memory.dat When the VHDL simulation is started it will load the contents of the memory.dat file into its main memory.

   
   
10. Execute the VHDL machine simulation:
    • vs87 machine.machine
    • run

      Notice that there are no signals to trace when simulating the machine. Simulating the machine loads the microprog.dat file into the microprogram ROM and loads the memory.dat file into the main memory. When both of these files are loaded the machine begins by passing the microinstruction at address 0 to the micro-instruction register. This begins the first Fetch that retrieves the first machine language instruction from main memory.

      The results of running the machine should be:

      (0 ns) run # R-0: 10010011000000000000000000111111 # R-4: 10010011000000010000111100001111 # R-8: 10011001000000011111000011110000 # R-12: 10010011000011110000000000110100 # R-16: 10011001000011110000000000000000 # R-20: 01000010111100000000000000000000 # W-52: 00000000000000000000000000111111 # R-24: 10010011000011110000000000111000 # R-28: 10011001000011110000000000000000 # R-32: 01000010111100010000000000000000 # W-56: 11110000111100000000111100001111 # R-36: 10010011000000100000000000111000 # R-40: 10011001000000100000000000000000 # R-44: 01000010001000010000000000000100 # W-60: 11110000111100000000111100001111 # R-48: 11111111111111111111111111111111 (2147483647 ns)

      The output of a machine simulation is simply a report of every memory access performed. For example the preceding program shows that memory addresses 0 - 20 were read (R). These reads are a result of Fetching machine language instructions from the main memory. Then memory address 52 was written (W) as a result of the STORE R0 X instruction. The next three reads (24, 28, 32) are the Fetching of the three machine language instructions required to implement the STORE R1 Y assembly language instruction.

      This output will be the only means by which you are able to determine if your microprogram is working. Thus, you will need to plan your assembly language test program very carefully. This will require that you understand how each assembly language instruction is converted into machine language and how each machine language instruction is carried out in microinstructions.

    
    
11. From here you will need to augment the microprog-start.masm file with implementations for each of the remaining machine language instructions. As you add the microinstructions for each machine language instruction, document its functionality as was done for the ones you were given. It is recommended that you add one machine language instruction at a time testing each as it is added and only going onto the next instruction when the current one works. Testing each new machine language instruction requires adding assembly language to the test-start.asm file. Your assembly language test program should use comments similar to those provided to thoroughly document your testing process.

The design document for this project must fully describe the implementation and testing of the machine language instructions ADD, LOAD and BZERO.

The design section of your document must thoroughly discuss how ADD, LOAD and BZERO are implemented. This discussion should focus on describing the effects that the microinstructions have on the components of the datapath and why those actions implement the machine language. Use the standard abbreviations for the datapath components as described in class 19 when referring to the datapath.

The test section of your document must thoroughly describe how the ADD, LOAD and BZERO instructions were tested. This will include a description of the assembly language instructions that were used and why they are effective. To be complete you will need to discuss the machine language generated by assembling the portion of your test program related to ADD, LOAD and BZERO. This discussion should clearly show that your implementation has been thoroughly tested. In particular, you will need to show that the offset feature of LOAD has been tested and that BZERO works both when the branch is taken and when it is not.

Submissions:

For this project you must submit:

• A hard copy of your design document.
  
  
• *.v - Your group's account should contain all of the VHDL files necessary to build a working machine. This will include all of the given files and a solution to each of the projects. You should use your own solutions to the projects if they are in working order.
  
  
• analyze.bash - This should be an edited version of the shell script that was given to analyze all of the VHDL. If you use your own solutions to projects 4 or 5 you will need to edit analyze.bash so that it analyzes your solutions and not mine. Essentially, running this file should produce a complete working machine simulator in a vlib named machine.
  
  
• test.asm - This is the assembly language test program that you used to verify that your micro-program is working correctly. This should be the file before it has been assembled into machine language.
  
  
• microprog.masm - This is the micro-program file that implements the micro-program for your machine. This should be the file before it has been assembled by the microassembler.
  
  
• To submit files:
  • Open a terminal window.
  • ftp 172.16.16.234
  • Enter your group's name and password
  • mput *.v
  • put analyze.bash
  • put test.asm
  • put microprog.masm
  • ls - to make sure they transferred.
  • quit

Files you may need for this project:

• New Files:
  • analyze.bash - Bash shell script that analyzes all of the files necessary to build the VHDL machine simulator.
    
    
  • add4 - VHDL Implementation of a +4 unit.
  • bus32mux2.v - VHDL Implementation of a 2 input 32 bit bus multiplexor.
  • clock.v - VHDL Implementation of the system clock.
  • dataPath.v - VHDL Implementation of the datapath for our machine.
  • machine.v - VHDL Implementation of our complete machine including the datapath, control unit and main memory.
  • mainmemory.v - VHDL Implementation of an 8kb main memory unit.
  • microcu.v - VHDL Implementation of the micro-program control unit for our machine.
  • microcurom.v - VHDL Implementation of the micro-program ROM used by our micro-program control unit.
  • shiftLeft2.v - VHDL Implementation of a shift left 2 unit.
  • shifter32.v - VHDL Implementation of a 32 bit shifter.
  • signExtend.v - VHDL Implementation of our sign extension unit.
  • tristate32.v - VHDL Implementation of a tri-state buffer.
  
  
• Old Files:
  • lgates.v - VHDL Implementation of the basic 2 input logic gates.
  • lgates3.v - VHDL Implementation of 3 input logic gates.
  • lgates4.v - VHDL Implementation of 4 input logic gates.
  • mux.v - VHDL Implementation of various multiplexers.
  • dec.v - VHDL Implementation of various decoders.
  
  
• Project Solutions:
  
  
  • Project #2: A One Bit Adder Circuit
    • fulladder.v - VHDL Implementation of a full adder.
    
    
  • Project #3: A One Bit ALU
    • bitALU.v - VHDL Implementation of a one bit ALU.
    
    
  • Project #4: A 32 Bit ALU
    • fourBitALU.v - VHDL Implementation of a four bit carry ripple ALU.
    • ALU.v - VHDL Implementation of a 32 bit carry ripple ALU.
    • zeroDetector.v - VHDL Implementation of a 32 bit zero detector.
    
    
  • Project #5: A Register Bank
    • clockedD.v - VHDL Implementation of a clocked D latch.
    • Dflipflop.v - VHDL Implementation of a D-Flip-Flop.
    • latch32.v - VHDL Implementation of a 32 bit latch.
      
      
    • bus4mux2.v - VHDL implementation of a 2 input 4 bit bus multiplexor.
    • bus32mux4.v - VHDL Implementation of a 4 input 32 bit bus multiplexor.
    • bus32mux16.v - VHDL Implementation of a 16 input 32 bit bus multiplexor.
      
      
    • registerBank.v - VHDL Implementation of a register bank with sixteen 32 bit registers.